In a process of manufacturing semiconductor devices, an alignment mark is used for positioning a mask in a light exposure apparatus, and an overlay mark is used for determining an overlay deviation amount between patterns of layers stacked in a vertical direction. The alignment mark and the overlay mark are arranged together with other types of marks on dicing lines of a substrate.
In semiconductor memory devices, it is desired that the area of a memory cell region for arranging memory elements should be set as large as possible to increase the storage capacity. One of the methods for increasing the area of the memory cell region is to reduce the area of dicing lines. However, since various types of marks used for manufacturing semiconductor devices are arranged on the dicing lines, it is difficult to reduce the area of the dicing lines.